Nios® II to Nios® V Migration Design

Title: Nios® II to Nios® V Migration Design Tutorial

Step 1: Create a New Project

• Open the new project wizard and select the AX7F series transceiver SoC Dev Kit.
• Use the Platform Designer to create a Qsys design for testing the 14-point rate of the processor using the Link Pack Benchmark code.

Step 2: Modify the Link Pack Benchmark Code

• Obtain the Link Pack Benchmark code from the provided link in the video.
• Modify the code to make it compatible with the NEOS processor.

Step 3: Evaluate Nios II Processor Performance

• Run the Link Pack Benchmark code on the Nios II processor and record the performance (e.g., 3,284 kilofls).

Step 4: Upgrade from Nios II to Nios V Processor

• In the Platform Designer, right-click on the Nios II processor IP and select "replace."
• Choose the Nios V processor IP and click "replace."
• Enable the 14-point unit and reset from debug module in the parameter window, then click "finish."

Step 5: Connection Migration and Configuration

• Reconnect data master to data manager, instruction master to instruction manager, and debug men save to DM agent.
• Rename the new Nios V processor IP and make necessary connections (e.g., disconnect dbg reset out from reset and connect dbg reset to NDM reset in).

Step 6: System Configuration

• Connect timer s agent to data manager and assign base addresses in the system.
• Configure the SPG IP parameters under vectors and select reset agent to on-chip memory.
• Generate the system HDL and compile the design.

Step 7: Programming and Testing

• Program a soft file to the Dev Kit through the programmer.
• Verify the Qsys design and ensure successful compilation.

Step 8: Software Upgrade

• Create a new software file containing the application and Board Support Package (BSP).
• Copy the source code from the Nios II processor software file to the Nios V processor software file.

Step 9: BSP Configuration

• Open the BSP editor in the Platform Designer and create a new BSP file (e.g., settings.bsp).
• Select the Q file generated earlier and create the BSP.

Step 10: Application Deployment

• Apply the same settings from the Nios II processor BSP to the Nios V processor BSP.
• Configure the memory region to on-chip memory in the BSP linker script and generate the PSP.

Step 11: Run the Application

• Use the command shell to start the Nios V shell and run the Nios V app command to create the CMAC list text for the application.
• Execute the CMAC executable and download the L file into the Nios V processor.

Step 12: Verify Performance

• Use J terminal to print the results for both Nios II and Nios V processors.
• Compare the performance results and observe the improvement in the Nios V processor (e.g., 3,697 kilofls).

Congratulations! You have successfully upgraded the design from Nios II to Nios V processor and evaluated the performance improvement.